Merge branch 'dev'
This commit is contained in:
XMRig
commit
7cf3db7750
18 changed files with 979 additions and 750 deletions
10
CHANGELOG.md
10
CHANGELOG.md
|
|
@ -1,3 +1,13 @@
|
|||
# v6.21.0
|
||||
- [#3302](https://github.com/xmrig/xmrig/pull/3302) [#3312](https://github.com/xmrig/xmrig/pull/3312) Enabled keepalive for Windows (>= Vista).
|
||||
- [#3320](https://github.com/xmrig/xmrig/pull/3320) Added "built for OS/architecture/bits" to "ABOUT".
|
||||
- [#3339](https://github.com/xmrig/xmrig/pull/3339) Added SNI option for TLS connections.
|
||||
- [#3342](https://github.com/xmrig/xmrig/pull/3342) Update `cn_main_loop.asm`.
|
||||
- [#3346](https://github.com/xmrig/xmrig/pull/3346) ARM64 JIT: don't use `x18` register.
|
||||
- [#3348](https://github.com/xmrig/xmrig/pull/3348) Update to latest `sse2neon.h`.
|
||||
- [#3356](https://github.com/xmrig/xmrig/pull/3356) Updated pricing record size for **Zephyr** solo mining.
|
||||
- [#3358](https://github.com/xmrig/xmrig/pull/3358) **Zephyr** solo mining: handle multiple outputs.
|
||||
|
||||
# v6.20.0
|
||||
- Added new ARM CPU names.
|
||||
- [#2394](https://github.com/xmrig/xmrig/pull/2394) Added new CMake options `ARM_V8` and `ARM_V7`.
|
||||
|
|
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|||
|
|
@ -1,6 +1,6 @@
|
|||
/* XMRig
|
||||
* Copyright (c) 2018-2021 SChernykh <https://github.com/SChernykh>
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||||
* Copyright (c) 2016-2021 XMRig <https://github.com/xmrig>, <support@xmrig.com>
|
||||
* Copyright (c) 2018-2023 SChernykh <https://github.com/SChernykh>
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||||
* Copyright (c) 2016-2023 XMRig <https://github.com/xmrig>, <support@xmrig.com>
|
||||
*
|
||||
* This program is free software: you can redistribute it and/or modify
|
||||
* it under the terms of the GNU General Public License as published by
|
||||
|
|
@ -49,6 +49,12 @@ public:
|
|||
static inline bool isUserActive(uint64_t ms) { return idleTime() < ms; }
|
||||
static inline const String &userAgent() { return m_userAgent; }
|
||||
|
||||
# ifdef XMRIG_OS_WIN
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||||
static bool hasKeepalive();
|
||||
# else
|
||||
static constexpr bool hasKeepalive() { return true; }
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||||
# endif
|
||||
|
||||
static bool isOnBatteryPower();
|
||||
static uint64_t idleTime();
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||||
|
||||
|
|
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|||
|
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@ -1,6 +1,6 @@
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|||
/* XMRig
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||||
* Copyright (c) 2018-2021 SChernykh <https://github.com/SChernykh>
|
||||
* Copyright (c) 2016-2021 XMRig <https://github.com/xmrig>, <support@xmrig.com>
|
||||
* Copyright (c) 2018-2023 SChernykh <https://github.com/SChernykh>
|
||||
* Copyright (c) 2016-2023 XMRig <https://github.com/xmrig>, <support@xmrig.com>
|
||||
*
|
||||
* This program is free software: you can redistribute it and/or modify
|
||||
* it under the terms of the GNU General Public License as published by
|
||||
|
|
@ -16,7 +16,6 @@
|
|||
* along with this program. If not, see <http://www.gnu.org/licenses/>.
|
||||
*/
|
||||
|
||||
|
||||
#include <algorithm>
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||||
#include <winsock2.h>
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||||
#include <windows.h>
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||||
|
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@ -70,6 +69,12 @@ char *xmrig::Platform::createUserAgent()
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|||
}
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||||
|
||||
|
||||
bool xmrig::Platform::hasKeepalive()
|
||||
{
|
||||
return winOsVersion().dwMajorVersion >= 6;
|
||||
}
|
||||
|
||||
|
||||
#ifndef XMRIG_FEATURE_HWLOC
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||||
bool xmrig::Platform::setThreadAffinity(uint64_t cpu_id)
|
||||
{
|
||||
|
|
|
|||
|
|
@ -142,7 +142,7 @@ void xmrig::BaseConfig::printVersions()
|
|||
snprintf(buf, sizeof buf, "MSVC/%d", MSVC_VERSION);
|
||||
# endif
|
||||
|
||||
Log::print(GREEN_BOLD(" * ") WHITE_BOLD("%-13s") CYAN_BOLD("%s/%s") WHITE_BOLD(" %s"), "ABOUT", APP_NAME, APP_VERSION, buf);
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||||
Log::print(GREEN_BOLD(" * ") WHITE_BOLD("%-13s") CYAN_BOLD("%s/%s") WHITE_BOLD(" %s") WHITE_BOLD(" (built for %s") WHITE_BOLD(" %s,") WHITE_BOLD(" %s)"), "ABOUT", APP_NAME, APP_VERSION, buf, APP_OS, APP_ARCH, APP_BITS);
|
||||
|
||||
std::string libs;
|
||||
|
||||
|
|
|
|||
|
|
@ -1,7 +1,7 @@
|
|||
/* XMRig
|
||||
* Copyright (c) 2019 jtgrassie <https://github.com/jtgrassie>
|
||||
* Copyright (c) 2018-2021 SChernykh <https://github.com/SChernykh>
|
||||
* Copyright (c) 2016-2021 XMRig <https://github.com/xmrig>, <support@xmrig.com>
|
||||
* Copyright (c) 2018-2023 SChernykh <https://github.com/SChernykh>
|
||||
* Copyright (c) 2016-2023 XMRig <https://github.com/xmrig>, <support@xmrig.com>
|
||||
*
|
||||
* This program is free software: you can redistribute it and/or modify
|
||||
* it under the terms of the GNU General Public License as published by
|
||||
|
|
@ -42,13 +42,14 @@
|
|||
#include "base/io/json/JsonRequest.h"
|
||||
#include "base/io/log/Log.h"
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||||
#include "base/kernel/interfaces/IClientListener.h"
|
||||
#include "base/kernel/Platform.h"
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||||
#include "base/net/dns/Dns.h"
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||||
#include "base/net/dns/DnsRecords.h"
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||||
#include "base/net/stratum/Socks5.h"
|
||||
#include "base/net/tools/NetBuffer.h"
|
||||
#include "base/tools/Chrono.h"
|
||||
#include "base/tools/Cvt.h"
|
||||
#include "base/tools/cryptonote/BlobReader.h"
|
||||
#include "base/tools/Cvt.h"
|
||||
#include "net/JobResult.h"
|
||||
|
||||
|
||||
|
|
@ -343,6 +344,9 @@ bool xmrig::Client::close()
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|||
setState(ClosingState);
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||||
|
||||
if (uv_is_closing(reinterpret_cast<uv_handle_t*>(m_socket)) == 0) {
|
||||
if (Platform::hasKeepalive()) {
|
||||
uv_tcp_keepalive(m_socket, 0, 60);
|
||||
}
|
||||
uv_close(reinterpret_cast<uv_handle_t*>(m_socket), Client::onClose);
|
||||
}
|
||||
|
||||
|
|
@ -567,9 +571,9 @@ void xmrig::Client::connect(const sockaddr *addr)
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|||
uv_tcp_init(uv_default_loop(), m_socket);
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||||
uv_tcp_nodelay(m_socket, 1);
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||||
|
||||
# ifndef WIN32
|
||||
uv_tcp_keepalive(m_socket, 1, 60);
|
||||
# endif
|
||||
if (Platform::hasKeepalive()) {
|
||||
uv_tcp_keepalive(m_socket, 1, 60);
|
||||
}
|
||||
|
||||
uv_tcp_connect(req, m_socket, addr, onConnect);
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||||
}
|
||||
|
|
@ -585,7 +589,7 @@ void xmrig::Client::handshake()
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|||
if (isTLS()) {
|
||||
m_expire = Chrono::steadyMSecs() + kResponseTimeout;
|
||||
|
||||
m_tls->handshake();
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||||
m_tls->handshake(m_pool.isSNI() ? m_pool.host().data() : nullptr);
|
||||
}
|
||||
else
|
||||
# endif
|
||||
|
|
|
|||
|
|
@ -1,13 +1,13 @@
|
|||
/* XMRig
|
||||
* Copyright 2010 Jeff Garzik <jgarzik@pobox.com>
|
||||
* Copyright 2012-2014 pooler <pooler@litecoinpool.org>
|
||||
* Copyright 2014 Lucas Jones <https://github.com/lucasjones>
|
||||
* Copyright 2014-2016 Wolf9466 <https://github.com/OhGodAPet>
|
||||
* Copyright 2016 Jay D Dee <jayddee246@gmail.com>
|
||||
* Copyright 2017-2018 XMR-Stak <https://github.com/fireice-uk>, <https://github.com/psychocrypt>
|
||||
* Copyright 2019 Howard Chu <https://github.com/hyc>
|
||||
* Copyright 2018-2020 SChernykh <https://github.com/SChernykh>
|
||||
* Copyright 2016-2020 XMRig <https://github.com/xmrig>, <support@xmrig.com>
|
||||
* Copyright (c) 2010 Jeff Garzik <jgarzik@pobox.com>
|
||||
* Copyright (c) 2012-2014 pooler <pooler@litecoinpool.org>
|
||||
* Copyright (c) 2014 Lucas Jones <https://github.com/lucasjones>
|
||||
* Copyright (c) 2014-2016 Wolf9466 <https://github.com/OhGodAPet>
|
||||
* Copyright (c) 2016 Jay D Dee <jayddee246@gmail.com>
|
||||
* Copyright (c) 2017-2018 XMR-Stak <https://github.com/fireice-uk>, <https://github.com/psychocrypt>
|
||||
* Copyright (c) 2019 Howard Chu <https://github.com/hyc>
|
||||
* Copyright (c) 2018-2023 SChernykh <https://github.com/SChernykh>
|
||||
* Copyright (c) 2016-2023 XMRig <https://github.com/xmrig>, <support@xmrig.com>
|
||||
*
|
||||
* This program is free software: you can redistribute it and/or modify
|
||||
* it under the terms of the GNU General Public License as published by
|
||||
|
|
@ -23,7 +23,6 @@
|
|||
* along with this program. If not, see <http://www.gnu.org/licenses/>.
|
||||
*/
|
||||
|
||||
|
||||
#include <uv.h>
|
||||
|
||||
|
||||
|
|
@ -34,6 +33,7 @@
|
|||
#include "base/io/json/JsonRequest.h"
|
||||
#include "base/io/log/Log.h"
|
||||
#include "base/kernel/interfaces/IClientListener.h"
|
||||
#include "base/kernel/Platform.h"
|
||||
#include "base/net/dns/Dns.h"
|
||||
#include "base/net/dns/DnsRecords.h"
|
||||
#include "base/net/http/Fetch.h"
|
||||
|
|
@ -42,9 +42,9 @@
|
|||
#include "base/net/stratum/SubmitResult.h"
|
||||
#include "base/net/tools/NetBuffer.h"
|
||||
#include "base/tools/bswap_64.h"
|
||||
#include "base/tools/cryptonote/Signatures.h"
|
||||
#include "base/tools/Cvt.h"
|
||||
#include "base/tools/Timer.h"
|
||||
#include "base/tools/cryptonote/Signatures.h"
|
||||
#include "net/JobResult.h"
|
||||
|
||||
|
||||
|
|
@ -358,9 +358,9 @@ void xmrig::DaemonClient::onResolved(const DnsRecords &records, int status, cons
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|||
uv_tcp_init(uv_default_loop(), s);
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||||
uv_tcp_nodelay(s, 1);
|
||||
|
||||
# ifndef WIN32
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||||
uv_tcp_keepalive(s, 1, 60);
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||||
# endif
|
||||
if (Platform::hasKeepalive()) {
|
||||
uv_tcp_keepalive(s, 1, 60);
|
||||
}
|
||||
|
||||
if (m_pool.zmq_port() > 0) {
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||||
delete m_ZMQSocket;
|
||||
|
|
@ -589,6 +589,9 @@ void xmrig::DaemonClient::retry()
|
|||
}
|
||||
|
||||
if ((m_ZMQConnectionState != ZMQ_NOT_CONNECTED) && (m_ZMQConnectionState != ZMQ_DISCONNECTING)) {
|
||||
if (Platform::hasKeepalive()) {
|
||||
uv_tcp_keepalive(m_ZMQSocket, 0, 60);
|
||||
}
|
||||
uv_close(reinterpret_cast<uv_handle_t*>(m_ZMQSocket), onZMQClose);
|
||||
}
|
||||
|
||||
|
|
@ -916,6 +919,9 @@ bool xmrig::DaemonClient::ZMQClose(bool shutdown)
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|||
m_ZMQConnectionState = ZMQ_DISCONNECTING;
|
||||
|
||||
if (uv_is_closing(reinterpret_cast<uv_handle_t*>(m_ZMQSocket)) == 0) {
|
||||
if (Platform::hasKeepalive()) {
|
||||
uv_tcp_keepalive(m_ZMQSocket, 0, 60);
|
||||
}
|
||||
uv_close(reinterpret_cast<uv_handle_t*>(m_ZMQSocket), shutdown ? onZMQShutdown : onZMQClose);
|
||||
if (!shutdown) {
|
||||
retry();
|
||||
|
|
|
|||
|
|
@ -77,6 +77,7 @@ const char *Pool::kSelfSelect = "self-select";
|
|||
const char *Pool::kSOCKS5 = "socks5";
|
||||
const char *Pool::kSubmitToOrigin = "submit-to-origin";
|
||||
const char *Pool::kTls = "tls";
|
||||
const char *Pool::kSni = "sni";
|
||||
const char *Pool::kUrl = "url";
|
||||
const char *Pool::kUser = "user";
|
||||
const char *Pool::kSpendSecretKey = "spend-secret-key";
|
||||
|
|
@ -137,6 +138,7 @@ xmrig::Pool::Pool(const rapidjson::Value &object) :
|
|||
m_flags.set(FLAG_ENABLED, Json::getBool(object, kEnabled, true));
|
||||
m_flags.set(FLAG_NICEHASH, Json::getBool(object, kNicehash) || m_url.host().contains(kNicehashHost));
|
||||
m_flags.set(FLAG_TLS, Json::getBool(object, kTls) || m_url.isTLS());
|
||||
m_flags.set(FLAG_SNI, Json::getBool(object, kSni));
|
||||
|
||||
setKeepAlive(Json::getValue(object, kKeepalive));
|
||||
|
||||
|
|
@ -299,6 +301,7 @@ rapidjson::Value xmrig::Pool::toJSON(rapidjson::Document &doc) const
|
|||
|
||||
obj.AddMember(StringRef(kEnabled), m_flags.test(FLAG_ENABLED), allocator);
|
||||
obj.AddMember(StringRef(kTls), isTLS(), allocator);
|
||||
obj.AddMember(StringRef(kSni), isSNI(), allocator);
|
||||
obj.AddMember(StringRef(kFingerprint), m_fingerprint.toJSON(), allocator);
|
||||
obj.AddMember(StringRef(kDaemon), m_mode == MODE_DAEMON, allocator);
|
||||
obj.AddMember(StringRef(kSOCKS5), m_proxy.toJSON(doc), allocator);
|
||||
|
|
|
|||
|
|
@ -70,6 +70,7 @@ public:
|
|||
static const char *kSOCKS5;
|
||||
static const char *kSubmitToOrigin;
|
||||
static const char *kTls;
|
||||
static const char* kSni;
|
||||
static const char *kUrl;
|
||||
static const char *kUser;
|
||||
static const char* kSpendSecretKey;
|
||||
|
|
@ -95,6 +96,7 @@ public:
|
|||
|
||||
inline bool isNicehash() const { return m_flags.test(FLAG_NICEHASH); }
|
||||
inline bool isTLS() const { return m_flags.test(FLAG_TLS) || m_url.isTLS(); }
|
||||
inline bool isSNI() const { return m_flags.test(FLAG_SNI); }
|
||||
inline bool isValid() const { return m_url.isValid(); }
|
||||
inline const Algorithm &algorithm() const { return m_algorithm; }
|
||||
inline const Coin &coin() const { return m_coin; }
|
||||
|
|
@ -138,6 +140,7 @@ private:
|
|||
FLAG_ENABLED,
|
||||
FLAG_NICEHASH,
|
||||
FLAG_TLS,
|
||||
FLAG_SNI,
|
||||
FLAG_MAX
|
||||
};
|
||||
|
||||
|
|
|
|||
|
|
@ -60,7 +60,7 @@ xmrig::Client::Tls::~Tls()
|
|||
}
|
||||
|
||||
|
||||
bool xmrig::Client::Tls::handshake()
|
||||
bool xmrig::Client::Tls::handshake(const char* servername)
|
||||
{
|
||||
m_ssl = SSL_new(m_ctx);
|
||||
assert(m_ssl != nullptr);
|
||||
|
|
@ -69,6 +69,10 @@ bool xmrig::Client::Tls::handshake()
|
|||
return false;
|
||||
}
|
||||
|
||||
if (servername) {
|
||||
SSL_set_tlsext_host_name(m_ssl, servername);
|
||||
}
|
||||
|
||||
SSL_set_connect_state(m_ssl);
|
||||
SSL_set_bio(m_ssl, m_read, m_write);
|
||||
SSL_do_handshake(m_ssl);
|
||||
|
|
|
|||
|
|
@ -42,7 +42,7 @@ public:
|
|||
Tls(Client *client);
|
||||
~Tls();
|
||||
|
||||
bool handshake();
|
||||
bool handshake(const char* servername);
|
||||
bool send(const char *data, size_t size);
|
||||
const char *fingerprint() const;
|
||||
const char *version() const;
|
||||
|
|
|
|||
|
|
@ -198,7 +198,7 @@ bool xmrig::BlockTemplate::parse(bool hashes)
|
|||
}
|
||||
|
||||
if (m_coin == Coin::ZEPHYR) {
|
||||
uint8_t pricing_record[24];
|
||||
uint8_t pricing_record[120];
|
||||
ar(pricing_record);
|
||||
}
|
||||
|
||||
|
|
@ -225,8 +225,12 @@ bool xmrig::BlockTemplate::parse(bool hashes)
|
|||
ar(m_height);
|
||||
ar(m_numOutputs);
|
||||
|
||||
const uint64_t expected_outputs = (m_coin == Coin::ZEPHYR) ? 2 : 1;
|
||||
if (m_numOutputs != expected_outputs) {
|
||||
if (m_coin == Coin::ZEPHYR) {
|
||||
if (m_numOutputs < 2) {
|
||||
return false;
|
||||
}
|
||||
}
|
||||
else if (m_numOutputs != 1) {
|
||||
return false;
|
||||
}
|
||||
|
||||
|
|
@ -252,23 +256,25 @@ bool xmrig::BlockTemplate::parse(bool hashes)
|
|||
ar.skip(asset_type_len);
|
||||
ar(m_viewTag);
|
||||
|
||||
uint64_t amount2;
|
||||
ar(amount2);
|
||||
for (uint64_t k = 1; k < m_numOutputs; ++k) {
|
||||
uint64_t amount2;
|
||||
ar(amount2);
|
||||
|
||||
uint8_t output_type2;
|
||||
ar(output_type2);
|
||||
if (output_type2 != 2) {
|
||||
return false;
|
||||
uint8_t output_type2;
|
||||
ar(output_type2);
|
||||
if (output_type2 != 2) {
|
||||
return false;
|
||||
}
|
||||
|
||||
Span key2;
|
||||
ar(key2, kKeySize);
|
||||
|
||||
ar(asset_type_len);
|
||||
ar.skip(asset_type_len);
|
||||
|
||||
uint8_t view_tag2;
|
||||
ar(view_tag2);
|
||||
}
|
||||
|
||||
Span key2;
|
||||
ar(key2, kKeySize);
|
||||
|
||||
ar(asset_type_len);
|
||||
ar.skip(asset_type_len);
|
||||
|
||||
uint8_t view_tag2;
|
||||
ar(view_tag2);
|
||||
}
|
||||
else if (m_outputType == 3) {
|
||||
ar(m_viewTag);
|
||||
|
|
|
|||
|
|
@ -8,6 +8,7 @@ PUBLIC cnv2_mainloop_bulldozer_asm
|
|||
PUBLIC cnv2_double_mainloop_sandybridge_asm
|
||||
PUBLIC cnv2_rwz_mainloop_asm
|
||||
PUBLIC cnv2_rwz_double_mainloop_asm
|
||||
PUBLIC cnv2_upx_double_mainloop_zen3_asm
|
||||
|
||||
ALIGN(64)
|
||||
cnv1_single_mainloop_asm PROC
|
||||
|
|
|
|||
|
|
@ -8,6 +8,7 @@ PUBLIC cnv2_mainloop_bulldozer_asm
|
|||
PUBLIC cnv2_double_mainloop_sandybridge_asm
|
||||
PUBLIC cnv2_rwz_mainloop_asm
|
||||
PUBLIC cnv2_rwz_double_mainloop_asm
|
||||
PUBLIC cnv2_upx_double_mainloop_zen3_asm
|
||||
|
||||
ALIGN(64)
|
||||
cnv1_single_mainloop_asm PROC
|
||||
|
|
|
|||
File diff suppressed because it is too large
Load diff
|
|
@ -1,7 +1,7 @@
|
|||
/* XMRig
|
||||
* Copyright (c) 2018-2020 tevador <tevador@gmail.com>
|
||||
* Copyright (c) 2018-2021 SChernykh <https://github.com/SChernykh>
|
||||
* Copyright (c) 2016-2021 XMRig <https://github.com/xmrig>, <support@xmrig.com>
|
||||
* Copyright (c) 2018-2023 SChernykh <https://github.com/SChernykh>
|
||||
* Copyright (c) 2016-2023 XMRig <https://github.com/xmrig>, <support@xmrig.com>
|
||||
*
|
||||
* This program is free software: you can redistribute it and/or modify
|
||||
* it under the terms of the GNU General Public License as published by
|
||||
|
|
@ -17,7 +17,6 @@
|
|||
* along with this program. If not, see <http://www.gnu.org/licenses/>.
|
||||
*/
|
||||
|
||||
|
||||
#include "crypto/common/VirtualMemory.h"
|
||||
#include "backend/cpu/Cpu.h"
|
||||
#include "crypto/common/portable/mm_malloc.h"
|
||||
|
|
@ -25,6 +24,7 @@
|
|||
|
||||
#include <cmath>
|
||||
#include <cstdlib>
|
||||
#include <fstream>
|
||||
#include <sys/mman.h>
|
||||
|
||||
|
||||
|
|
@ -84,7 +84,9 @@ static inline int hugePagesFlag(size_t size)
|
|||
|
||||
bool xmrig::VirtualMemory::isHugepagesAvailable()
|
||||
{
|
||||
# if defined(XMRIG_OS_MACOS) && defined(XMRIG_ARM)
|
||||
# ifdef XMRIG_OS_LINUX
|
||||
return std::ifstream("/proc/sys/vm/nr_hugepages").good() || std::ifstream("/sys/devices/system/node/node0/hugepages/hugepages-2048kB/nr_hugepages").good();
|
||||
# elif defined(XMRIG_OS_MACOS) && defined(XMRIG_ARM)
|
||||
return false;
|
||||
# else
|
||||
return true;
|
||||
|
|
|
|||
|
|
@ -131,8 +131,8 @@ void JitCompilerA64::generateProgram(Program& program, ProgramConfiguration& con
|
|||
// and w16, w10, ScratchpadL3Mask64
|
||||
emit32(0x121A0000 | 16 | (10 << 5) | ((RandomX_CurrentConfig.Log2_ScratchpadL3 - 7) << 10), code, codePos);
|
||||
|
||||
// and w17, w18, ScratchpadL3Mask64
|
||||
emit32(0x121A0000 | 17 | (18 << 5) | ((RandomX_CurrentConfig.Log2_ScratchpadL3 - 7) << 10), code, codePos);
|
||||
// and w17, w20, ScratchpadL3Mask64
|
||||
emit32(0x121A0000 | 17 | (20 << 5) | ((RandomX_CurrentConfig.Log2_ScratchpadL3 - 7) << 10), code, codePos);
|
||||
|
||||
codePos = PrologueSize;
|
||||
literalPos = ImulRcpLiteralsEnd;
|
||||
|
|
@ -148,16 +148,16 @@ void JitCompilerA64::generateProgram(Program& program, ProgramConfiguration& con
|
|||
}
|
||||
|
||||
// Update spMix2
|
||||
// eor w18, config.readReg2, config.readReg3
|
||||
emit32(ARMV8A::EOR32 | 18 | (IntRegMap[config.readReg2] << 5) | (IntRegMap[config.readReg3] << 16), code, codePos);
|
||||
// eor w20, config.readReg2, config.readReg3
|
||||
emit32(ARMV8A::EOR32 | 20 | (IntRegMap[config.readReg2] << 5) | (IntRegMap[config.readReg3] << 16), code, codePos);
|
||||
|
||||
// Jump back to the main loop
|
||||
const uint32_t offset = (((uint8_t*)randomx_program_aarch64_vm_instructions_end) - ((uint8_t*)randomx_program_aarch64)) - codePos;
|
||||
emit32(ARMV8A::B | (offset / 4), code, codePos);
|
||||
|
||||
// and w18, w18, CacheLineAlignMask
|
||||
// and w20, w20, CacheLineAlignMask
|
||||
codePos = (((uint8_t*)randomx_program_aarch64_cacheline_align_mask1) - ((uint8_t*)randomx_program_aarch64));
|
||||
emit32(0x121A0000 | 18 | (18 << 5) | ((RandomX_CurrentConfig.Log2_DatasetBaseSize - 7) << 10), code, codePos);
|
||||
emit32(0x121A0000 | 20 | (20 << 5) | ((RandomX_CurrentConfig.Log2_DatasetBaseSize - 7) << 10), code, codePos);
|
||||
|
||||
// and w10, w10, CacheLineAlignMask
|
||||
codePos = (((uint8_t*)randomx_program_aarch64_cacheline_align_mask2) - ((uint8_t*)randomx_program_aarch64));
|
||||
|
|
@ -189,8 +189,8 @@ void JitCompilerA64::generateProgramLight(Program& program, ProgramConfiguration
|
|||
// and w16, w10, ScratchpadL3Mask64
|
||||
emit32(0x121A0000 | 16 | (10 << 5) | ((RandomX_CurrentConfig.Log2_ScratchpadL3 - 7) << 10), code, codePos);
|
||||
|
||||
// and w17, w18, ScratchpadL3Mask64
|
||||
emit32(0x121A0000 | 17 | (18 << 5) | ((RandomX_CurrentConfig.Log2_ScratchpadL3 - 7) << 10), code, codePos);
|
||||
// and w17, w20, ScratchpadL3Mask64
|
||||
emit32(0x121A0000 | 17 | (20 << 5) | ((RandomX_CurrentConfig.Log2_ScratchpadL3 - 7) << 10), code, codePos);
|
||||
|
||||
codePos = PrologueSize;
|
||||
literalPos = ImulRcpLiteralsEnd;
|
||||
|
|
@ -206,8 +206,8 @@ void JitCompilerA64::generateProgramLight(Program& program, ProgramConfiguration
|
|||
}
|
||||
|
||||
// Update spMix2
|
||||
// eor w18, config.readReg2, config.readReg3
|
||||
emit32(ARMV8A::EOR32 | 18 | (IntRegMap[config.readReg2] << 5) | (IntRegMap[config.readReg3] << 16), code, codePos);
|
||||
// eor w20, config.readReg2, config.readReg3
|
||||
emit32(ARMV8A::EOR32 | 20 | (IntRegMap[config.readReg2] << 5) | (IntRegMap[config.readReg3] << 16), code, codePos);
|
||||
|
||||
// Jump back to the main loop
|
||||
const uint32_t offset = (((uint8_t*)randomx_program_aarch64_vm_instructions_end_light) - ((uint8_t*)randomx_program_aarch64)) - codePos;
|
||||
|
|
@ -477,7 +477,7 @@ void JitCompilerA64::emitAddImmediate(uint32_t dst, uint32_t src, uint32_t imm,
|
|||
}
|
||||
else
|
||||
{
|
||||
constexpr uint32_t tmp_reg = 18;
|
||||
constexpr uint32_t tmp_reg = 20;
|
||||
emitMovImmediate(tmp_reg, imm, code, k);
|
||||
|
||||
// add dst, src, tmp_reg
|
||||
|
|
@ -526,7 +526,7 @@ void JitCompilerA64::emitMemLoadFP(uint32_t src, Instruction& instr, uint8_t* co
|
|||
uint32_t k = codePos;
|
||||
|
||||
uint32_t imm = instr.getImm32();
|
||||
constexpr uint32_t tmp_reg = 18;
|
||||
constexpr uint32_t tmp_reg = 19;
|
||||
|
||||
imm &= instr.getModMem() ? (RandomX_CurrentConfig.ScratchpadL1_Size - 1) : (RandomX_CurrentConfig.ScratchpadL2_Size - 1);
|
||||
emitAddImmediate(tmp_reg, src, imm, code, k);
|
||||
|
|
@ -580,7 +580,7 @@ void JitCompilerA64::h_IADD_M(Instruction& instr, uint32_t& codePos)
|
|||
const uint32_t src = IntRegMap[instr.src];
|
||||
const uint32_t dst = IntRegMap[instr.dst];
|
||||
|
||||
constexpr uint32_t tmp_reg = 18;
|
||||
constexpr uint32_t tmp_reg = 20;
|
||||
emitMemLoad<tmp_reg>(dst, src, instr, code, k);
|
||||
|
||||
// add dst, dst, tmp_reg
|
||||
|
|
@ -618,7 +618,7 @@ void JitCompilerA64::h_ISUB_M(Instruction& instr, uint32_t& codePos)
|
|||
const uint32_t src = IntRegMap[instr.src];
|
||||
const uint32_t dst = IntRegMap[instr.dst];
|
||||
|
||||
constexpr uint32_t tmp_reg = 18;
|
||||
constexpr uint32_t tmp_reg = 20;
|
||||
emitMemLoad<tmp_reg>(dst, src, instr, code, k);
|
||||
|
||||
// sub dst, dst, tmp_reg
|
||||
|
|
@ -637,7 +637,7 @@ void JitCompilerA64::h_IMUL_R(Instruction& instr, uint32_t& codePos)
|
|||
|
||||
if (src == dst)
|
||||
{
|
||||
src = 18;
|
||||
src = 20;
|
||||
emitMovImmediate(src, instr.getImm32(), code, k);
|
||||
}
|
||||
|
||||
|
|
@ -655,7 +655,7 @@ void JitCompilerA64::h_IMUL_M(Instruction& instr, uint32_t& codePos)
|
|||
const uint32_t src = IntRegMap[instr.src];
|
||||
const uint32_t dst = IntRegMap[instr.dst];
|
||||
|
||||
constexpr uint32_t tmp_reg = 18;
|
||||
constexpr uint32_t tmp_reg = 20;
|
||||
emitMemLoad<tmp_reg>(dst, src, instr, code, k);
|
||||
|
||||
// sub dst, dst, tmp_reg
|
||||
|
|
@ -686,7 +686,7 @@ void JitCompilerA64::h_IMULH_M(Instruction& instr, uint32_t& codePos)
|
|||
const uint32_t src = IntRegMap[instr.src];
|
||||
const uint32_t dst = IntRegMap[instr.dst];
|
||||
|
||||
constexpr uint32_t tmp_reg = 18;
|
||||
constexpr uint32_t tmp_reg = 20;
|
||||
emitMemLoad<tmp_reg>(dst, src, instr, code, k);
|
||||
|
||||
// umulh dst, dst, tmp_reg
|
||||
|
|
@ -717,7 +717,7 @@ void JitCompilerA64::h_ISMULH_M(Instruction& instr, uint32_t& codePos)
|
|||
const uint32_t src = IntRegMap[instr.src];
|
||||
const uint32_t dst = IntRegMap[instr.dst];
|
||||
|
||||
constexpr uint32_t tmp_reg = 18;
|
||||
constexpr uint32_t tmp_reg = 20;
|
||||
emitMemLoad<tmp_reg>(dst, src, instr, code, k);
|
||||
|
||||
// smulh dst, dst, tmp_reg
|
||||
|
|
@ -735,7 +735,7 @@ void JitCompilerA64::h_IMUL_RCP(Instruction& instr, uint32_t& codePos)
|
|||
|
||||
uint32_t k = codePos;
|
||||
|
||||
constexpr uint32_t tmp_reg = 18;
|
||||
constexpr uint32_t tmp_reg = 20;
|
||||
const uint32_t dst = IntRegMap[instr.dst];
|
||||
|
||||
constexpr uint64_t N = 1ULL << 63;
|
||||
|
|
@ -754,9 +754,9 @@ void JitCompilerA64::h_IMUL_RCP(Instruction& instr, uint32_t& codePos)
|
|||
literalPos -= sizeof(uint64_t);
|
||||
*(uint64_t*)(code + literalPos) = (q << shift) + ((r << shift) / divisor);
|
||||
|
||||
if (literal_id < 13)
|
||||
if (literal_id < 12)
|
||||
{
|
||||
static constexpr uint32_t literal_regs[13] = { 30 << 16, 29 << 16, 28 << 16, 27 << 16, 26 << 16, 25 << 16, 24 << 16, 23 << 16, 22 << 16, 21 << 16, 20 << 16, 11 << 16, 0 };
|
||||
static constexpr uint32_t literal_regs[12] = { 30 << 16, 29 << 16, 28 << 16, 27 << 16, 26 << 16, 25 << 16, 24 << 16, 23 << 16, 22 << 16, 21 << 16, 11 << 16, 0 };
|
||||
|
||||
// mul dst, dst, literal_reg
|
||||
emit32(ARMV8A::MUL | dst | (dst << 5) | literal_regs[literal_id], code, k);
|
||||
|
|
@ -794,7 +794,7 @@ void JitCompilerA64::h_IXOR_R(Instruction& instr, uint32_t& codePos)
|
|||
|
||||
if (src == dst)
|
||||
{
|
||||
src = 18;
|
||||
src = 20;
|
||||
emitMovImmediate(src, instr.getImm32(), code, k);
|
||||
}
|
||||
|
||||
|
|
@ -812,7 +812,7 @@ void JitCompilerA64::h_IXOR_M(Instruction& instr, uint32_t& codePos)
|
|||
const uint32_t src = IntRegMap[instr.src];
|
||||
const uint32_t dst = IntRegMap[instr.dst];
|
||||
|
||||
constexpr uint32_t tmp_reg = 18;
|
||||
constexpr uint32_t tmp_reg = 20;
|
||||
emitMemLoad<tmp_reg>(dst, src, instr, code, k);
|
||||
|
||||
// eor dst, dst, tmp_reg
|
||||
|
|
@ -850,7 +850,7 @@ void JitCompilerA64::h_IROL_R(Instruction& instr, uint32_t& codePos)
|
|||
|
||||
if (src != dst)
|
||||
{
|
||||
constexpr uint32_t tmp_reg = 18;
|
||||
constexpr uint32_t tmp_reg = 20;
|
||||
|
||||
// sub tmp_reg, xzr, src
|
||||
emit32(ARMV8A::SUB | tmp_reg | (31 << 5) | (src << 16), code, k);
|
||||
|
|
@ -878,7 +878,7 @@ void JitCompilerA64::h_ISWAP_R(Instruction& instr, uint32_t& codePos)
|
|||
|
||||
uint32_t k = codePos;
|
||||
|
||||
constexpr uint32_t tmp_reg = 18;
|
||||
constexpr uint32_t tmp_reg = 20;
|
||||
emit32(ARMV8A::MOV_REG | tmp_reg | (dst << 16), code, k);
|
||||
emit32(ARMV8A::MOV_REG | dst | (src << 16), code, k);
|
||||
emit32(ARMV8A::MOV_REG | src | (tmp_reg << 16), code, k);
|
||||
|
|
@ -1026,7 +1026,7 @@ void JitCompilerA64::h_CFROUND(Instruction& instr, uint32_t& codePos)
|
|||
|
||||
const uint32_t src = IntRegMap[instr.src];
|
||||
|
||||
constexpr uint32_t tmp_reg = 18;
|
||||
constexpr uint32_t tmp_reg = 20;
|
||||
constexpr uint32_t fpcr_tmp_reg = 8;
|
||||
|
||||
// ror tmp_reg, src, imm
|
||||
|
|
@ -1050,7 +1050,7 @@ void JitCompilerA64::h_ISTORE(Instruction& instr, uint32_t& codePos)
|
|||
|
||||
const uint32_t src = IntRegMap[instr.src];
|
||||
const uint32_t dst = IntRegMap[instr.dst];
|
||||
constexpr uint32_t tmp_reg = 18;
|
||||
constexpr uint32_t tmp_reg = 20;
|
||||
|
||||
uint32_t imm = instr.getImm32();
|
||||
|
||||
|
|
|
|||
|
|
@ -72,9 +72,9 @@
|
|||
# x15 -> "r7"
|
||||
# x16 -> spAddr0
|
||||
# x17 -> spAddr1
|
||||
# x18 -> temporary
|
||||
# x18 -> unused (platform register, don't touch it)
|
||||
# x19 -> temporary
|
||||
# x20 -> literal for IMUL_RCP
|
||||
# x20 -> temporary
|
||||
# x21 -> literal for IMUL_RCP
|
||||
# x22 -> literal for IMUL_RCP
|
||||
# x23 -> literal for IMUL_RCP
|
||||
|
|
@ -109,7 +109,7 @@ DECL(randomx_program_aarch64):
|
|||
# Save callee-saved registers
|
||||
sub sp, sp, 192
|
||||
stp x16, x17, [sp]
|
||||
stp x18, x19, [sp, 16]
|
||||
str x19, [sp, 16]
|
||||
stp x20, x21, [sp, 32]
|
||||
stp x22, x23, [sp, 48]
|
||||
stp x24, x25, [sp, 64]
|
||||
|
|
@ -164,7 +164,6 @@ DECL(randomx_program_aarch64):
|
|||
# Read literals
|
||||
ldr x0, literal_x0
|
||||
ldr x11, literal_x11
|
||||
ldr x20, literal_x20
|
||||
ldr x21, literal_x21
|
||||
ldr x22, literal_x22
|
||||
ldr x23, literal_x23
|
||||
|
|
@ -196,11 +195,11 @@ DECL(randomx_program_aarch64):
|
|||
DECL(randomx_program_aarch64_main_loop):
|
||||
# spAddr0 = spMix1 & ScratchpadL3Mask64;
|
||||
# spAddr1 = (spMix1 >> 32) & ScratchpadL3Mask64;
|
||||
lsr x18, x10, 32
|
||||
lsr x20, x10, 32
|
||||
|
||||
# Actual mask will be inserted by JIT compiler
|
||||
and w16, w10, 1
|
||||
and w17, w18, 1
|
||||
and w17, w20, 1
|
||||
|
||||
# x16 = scratchpad + spAddr0
|
||||
# x17 = scratchpad + spAddr1
|
||||
|
|
@ -208,31 +207,31 @@ DECL(randomx_program_aarch64_main_loop):
|
|||
add x17, x17, x2
|
||||
|
||||
# xor integer registers with scratchpad data (spAddr0)
|
||||
ldp x18, x19, [x16]
|
||||
eor x4, x4, x18
|
||||
ldp x20, x19, [x16]
|
||||
eor x4, x4, x20
|
||||
eor x5, x5, x19
|
||||
ldp x18, x19, [x16, 16]
|
||||
eor x6, x6, x18
|
||||
ldp x20, x19, [x16, 16]
|
||||
eor x6, x6, x20
|
||||
eor x7, x7, x19
|
||||
ldp x18, x19, [x16, 32]
|
||||
eor x12, x12, x18
|
||||
ldp x20, x19, [x16, 32]
|
||||
eor x12, x12, x20
|
||||
eor x13, x13, x19
|
||||
ldp x18, x19, [x16, 48]
|
||||
eor x14, x14, x18
|
||||
ldp x20, x19, [x16, 48]
|
||||
eor x14, x14, x20
|
||||
eor x15, x15, x19
|
||||
|
||||
# Load group F registers (spAddr1)
|
||||
ldpsw x18, x19, [x17]
|
||||
ins v16.d[0], x18
|
||||
ldpsw x20, x19, [x17]
|
||||
ins v16.d[0], x20
|
||||
ins v16.d[1], x19
|
||||
ldpsw x18, x19, [x17, 8]
|
||||
ins v17.d[0], x18
|
||||
ldpsw x20, x19, [x17, 8]
|
||||
ins v17.d[0], x20
|
||||
ins v17.d[1], x19
|
||||
ldpsw x18, x19, [x17, 16]
|
||||
ins v18.d[0], x18
|
||||
ldpsw x20, x19, [x17, 16]
|
||||
ins v18.d[0], x20
|
||||
ins v18.d[1], x19
|
||||
ldpsw x18, x19, [x17, 24]
|
||||
ins v19.d[0], x18
|
||||
ldpsw x20, x19, [x17, 24]
|
||||
ins v19.d[0], x20
|
||||
ins v19.d[1], x19
|
||||
scvtf v16.2d, v16.2d
|
||||
scvtf v17.2d, v17.2d
|
||||
|
|
@ -240,17 +239,17 @@ DECL(randomx_program_aarch64_main_loop):
|
|||
scvtf v19.2d, v19.2d
|
||||
|
||||
# Load group E registers (spAddr1)
|
||||
ldpsw x18, x19, [x17, 32]
|
||||
ins v20.d[0], x18
|
||||
ldpsw x20, x19, [x17, 32]
|
||||
ins v20.d[0], x20
|
||||
ins v20.d[1], x19
|
||||
ldpsw x18, x19, [x17, 40]
|
||||
ins v21.d[0], x18
|
||||
ldpsw x20, x19, [x17, 40]
|
||||
ins v21.d[0], x20
|
||||
ins v21.d[1], x19
|
||||
ldpsw x18, x19, [x17, 48]
|
||||
ins v22.d[0], x18
|
||||
ldpsw x20, x19, [x17, 48]
|
||||
ins v22.d[0], x20
|
||||
ins v22.d[1], x19
|
||||
ldpsw x18, x19, [x17, 56]
|
||||
ins v23.d[0], x18
|
||||
ldpsw x20, x19, [x17, 56]
|
||||
ins v23.d[0], x20
|
||||
ins v23.d[1], x19
|
||||
scvtf v20.2d, v20.2d
|
||||
scvtf v21.2d, v21.2d
|
||||
|
|
@ -273,7 +272,6 @@ DECL(randomx_program_aarch64_vm_instructions):
|
|||
|
||||
literal_x0: .fill 1,8,0
|
||||
literal_x11: .fill 1,8,0
|
||||
literal_x20: .fill 1,8,0
|
||||
literal_x21: .fill 1,8,0
|
||||
literal_x22: .fill 1,8,0
|
||||
literal_x23: .fill 1,8,0
|
||||
|
|
@ -309,17 +307,17 @@ DECL(randomx_program_aarch64_vm_instructions_end):
|
|||
lsr x10, x9, 32
|
||||
|
||||
# mx ^= r[readReg2] ^ r[readReg3];
|
||||
eor x9, x9, x18
|
||||
eor x9, x9, x20
|
||||
|
||||
# Calculate dataset pointer for dataset prefetch
|
||||
mov w18, w9
|
||||
mov w20, w9
|
||||
DECL(randomx_program_aarch64_cacheline_align_mask1):
|
||||
# Actual mask will be inserted by JIT compiler
|
||||
and x18, x18, 1
|
||||
add x18, x18, x1
|
||||
and x20, x20, 1
|
||||
add x20, x20, x1
|
||||
|
||||
# Prefetch dataset data
|
||||
prfm pldl2strm, [x18]
|
||||
prfm pldl2strm, [x20]
|
||||
|
||||
# mx <-> ma
|
||||
ror x9, x9, 32
|
||||
|
|
@ -331,17 +329,17 @@ DECL(randomx_program_aarch64_cacheline_align_mask2):
|
|||
|
||||
DECL(randomx_program_aarch64_xor_with_dataset_line):
|
||||
# xor integer registers with dataset data
|
||||
ldp x18, x19, [x10]
|
||||
eor x4, x4, x18
|
||||
ldp x20, x19, [x10]
|
||||
eor x4, x4, x20
|
||||
eor x5, x5, x19
|
||||
ldp x18, x19, [x10, 16]
|
||||
eor x6, x6, x18
|
||||
ldp x20, x19, [x10, 16]
|
||||
eor x6, x6, x20
|
||||
eor x7, x7, x19
|
||||
ldp x18, x19, [x10, 32]
|
||||
eor x12, x12, x18
|
||||
ldp x20, x19, [x10, 32]
|
||||
eor x12, x12, x20
|
||||
eor x13, x13, x19
|
||||
ldp x18, x19, [x10, 48]
|
||||
eor x14, x14, x18
|
||||
ldp x20, x19, [x10, 48]
|
||||
eor x14, x14, x20
|
||||
eor x15, x15, x19
|
||||
|
||||
DECL(randomx_program_aarch64_update_spMix1):
|
||||
|
|
@ -384,7 +382,7 @@ DECL(randomx_program_aarch64_update_spMix1):
|
|||
|
||||
# Restore callee-saved registers
|
||||
ldp x16, x17, [sp]
|
||||
ldp x18, x19, [sp, 16]
|
||||
ldr x19, [sp, 16]
|
||||
ldp x20, x21, [sp, 32]
|
||||
ldp x22, x23, [sp, 48]
|
||||
ldp x24, x25, [sp, 64]
|
||||
|
|
@ -405,7 +403,7 @@ DECL(randomx_program_aarch64_vm_instructions_end_light):
|
|||
stp x2, x30, [sp, 80]
|
||||
|
||||
# mx ^= r[readReg2] ^ r[readReg3];
|
||||
eor x9, x9, x18
|
||||
eor x9, x9, x20
|
||||
|
||||
# mx <-> ma
|
||||
ror x9, x9, 32
|
||||
|
|
@ -447,8 +445,8 @@ DECL(randomx_program_aarch64_light_dataset_offset):
|
|||
# x3 -> end item
|
||||
|
||||
DECL(randomx_init_dataset_aarch64):
|
||||
# Save x30 (return address)
|
||||
str x30, [sp, -16]!
|
||||
# Save x20 (used as temporary, but must be saved to not break ABI) and x30 (return address)
|
||||
stp x20, x30, [sp, -16]!
|
||||
|
||||
# Load pointer to cache memory
|
||||
ldr x0, [x0]
|
||||
|
|
@ -460,8 +458,8 @@ DECL(randomx_init_dataset_aarch64_main_loop):
|
|||
cmp x2, x3
|
||||
bne DECL(randomx_init_dataset_aarch64_main_loop)
|
||||
|
||||
# Restore x30 (return address)
|
||||
ldr x30, [sp], 16
|
||||
# Restore x20 and x30
|
||||
ldp x20, x30, [sp], 16
|
||||
|
||||
ret
|
||||
|
||||
|
|
|
|||
|
|
@ -22,14 +22,14 @@
|
|||
#define APP_ID "xmrig"
|
||||
#define APP_NAME "XMRig"
|
||||
#define APP_DESC "XMRig miner"
|
||||
#define APP_VERSION "6.20.0"
|
||||
#define APP_VERSION "6.21.0-dev"
|
||||
#define APP_DOMAIN "xmrig.com"
|
||||
#define APP_SITE "www.xmrig.com"
|
||||
#define APP_COPYRIGHT "Copyright (C) 2016-2023 xmrig.com"
|
||||
#define APP_KIND "miner"
|
||||
|
||||
#define APP_VER_MAJOR 6
|
||||
#define APP_VER_MINOR 20
|
||||
#define APP_VER_MINOR 21
|
||||
#define APP_VER_PATCH 0
|
||||
|
||||
#ifdef _MSC_VER
|
||||
|
|
@ -52,4 +52,39 @@
|
|||
# endif
|
||||
#endif
|
||||
|
||||
#ifdef XMRIG_OS_WIN
|
||||
# define APP_OS "Windows"
|
||||
#elif defined XMRIG_OS_IOS
|
||||
# define APP_OS "iOS"
|
||||
#elif defined XMRIG_OS_MACOS
|
||||
# define APP_OS "macOS"
|
||||
#elif defined XMRIG_OS_ANDROID
|
||||
# define APP_OS "Android"
|
||||
#elif defined XMRIG_OS_LINUX
|
||||
# define APP_OS "Linux"
|
||||
#elif defined XMRIG_OS_FREEBSD
|
||||
# define APP_OS "FreeBSD"
|
||||
#else
|
||||
# define APP_OS "Unknown OS"
|
||||
#endif
|
||||
|
||||
#define STR(X) #X
|
||||
#define STR2(X) STR(X)
|
||||
|
||||
#ifdef XMRIG_ARM
|
||||
# define APP_ARCH "ARMv" STR2(XMRIG_ARM)
|
||||
#else
|
||||
# if defined(__x86_64__) || defined(__amd64__) || defined(_M_X64) || defined(_M_AMD64)
|
||||
# define APP_ARCH "x86-64"
|
||||
# else
|
||||
# define APP_ARCH "x86"
|
||||
# endif
|
||||
#endif
|
||||
|
||||
#ifdef XMRIG_64_BIT
|
||||
# define APP_BITS "64 bit"
|
||||
#else
|
||||
# define APP_BITS "32 bit"
|
||||
#endif
|
||||
|
||||
#endif // XMRIG_VERSION_H
|
||||
|
|
|
|||
Loading…
Reference in a new issue